EOL (End Of Life) for Trizeps VI with PXA168 (1100 MHz) and PXA166 (800 MHz). More Information ... (252.7 KB)
Constantly high quality through multi-stage test of each individual CPU module
To ensure a constantly high quality, each individual CPU module is passed through a multi-stage test. The test result covers 100% of all interfaces.
• AOI/MOI: Multiple automatic and manual optical control of each CPU module during the production.
• JTAG/Boundary Scan Test: JTAG/Boundary Scan Test: The signal of each pin which is accessible via the JTAG chain is checked for connection, shorts, missing pull-up/down resistors. The DDR Ram is tested for row/column pin assignment.
• Functional tests of high-speed and analog interfaces (Ethernet, display, USB, audio, etc.) which are not testable via JTAG